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  • Synopsys Launches Ultra-Low Power IP Subsystem for Sensors

    Published on July 30, 2013

    nav_snps_logoSynopsys, Inc. , a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of the DesignWare  Sensor IP Subsystem, a complete and integrated hardware and software solution for sensor control applications. The new IP subsystem is optimized to process data from digital and analog sensors, offloading the host processor and enabling more efficient processing of the sensor data with ultra-low power. The fully configurable subsystem consists of a DesignWare ARC  EM4 32-bit processor, digital interfaces, analog-to-digital data converters (ADCs), hardware accelerators, a comprehensive software library of DSP functions and software I/O drivers. The Design Ware Sensor IP Subsystem provides designers with a complete and pre-verified solution that meets the requirements of a broad range of applications such as smart sensors, sensor fusion and sensor hub.

    Sensors are becoming ubiquitous. Many applications, such as the Internet of Things, automobiles, and mobile devices, increasingly rely on the ability to read and interpret environmental conditions such as pressure, temperature, motion, and proximity. By pre-integrating sensor-specificIP blocks with an efficient processor and software in a single subsystem, Synopsys gives designers aSystem-on-Chip [SoC]-ready sensor solution that can significantly reduce their design and integration effort, lower design risk and accelerate time-to-market.

    “The total number of sensor units is estimated to grow from just under 10 billion in 2012 to nearly 30 billion in 2017,” said Tony Massimini, chief of technology at Semico Research. “As more semiconductor suppliers integrate sensor interfaces into their SoCs, the use of sensor IP subsystems such as Synopsys’ DesignWare Sensor IP Subsystem will significantly reduce their integration effort and cost.”

    Integrated Hardware

    The DesignWare Sensor IP Subsystem features the power- and area-efficientDesignWare ARC EM4 32-bit processor core, which includes custom extensions and instructions that support application-specific hardware accelerators andtightly integrated peripherals. The subsystem includes multiple configurable GPIO, SPI and I2Cdigital interfaces for off-chip sensor connections as well as ARM®AMBA®AHB™ and APB™ protocol system interfacesto ease integration into the full SoC. The analog interfaces include low-power high-resolution ADCs that efficiently digitize sensor data for the processor.The sensor subsystem’s HAPS® FPGA-based prototyping solution enables immediate software development and provides a scalable platform for rapid full system integration and validation. Synopsys also offers SoC integration servicesto help customers integrate the subsystem into their chip or customize it to meet their unique application requirements.

    “As the technology leader in magnetic sensor ICs for the automotive market, it is critical that Allegro acquires high-quality IP from a trusted provider such as Synopsys,” said Robert Fortin, director of sensors business unit at Allegro Microsystems, LLC. “Based on our experience, the DesignWareARC 32-bit processor’s combination of high performance, small area and low power provides key advantages for sensor design over alternative solutions.”

    Dedicated Software

    The DesignWare Sensor IP Subsystem offers a rich library of DSP functions, including mathematical, complex math, filtering (FIR, IIR, correlation, etc.), matrix/vector and decimation/interpolation that help accelerate sensor application code development. In addition, peripheral software drivers are provided to ease integration of the I/O with the ARC EM4 processor, and host drivers are provided to interface the DesignWare Sensor IP Subsystem to the host processor.

    The sensor-specific software functions can also be implemented in hardware toboost performance efficiency and reduce memory footprint. An easy-to-use configuration tool in combination with sensor-specific architectural templates allow designers to quickly select options such as the DSP functions and digital interfaces required for their specific application, enabling a complete sensor subsystem to be configured in hours instead of weeks.

    “The industry is seeingsignificantproliferation of sensor-enabled devices in homes, cars and on-the-go,” said John Koeter, vice president of marketing for IP and systems at Synopsys. “These devices require integrated sensor SoCs that deliver high performance, small area and low power consumption. Synopsys’ pre-verified, SoC-ready sensor subsystem provides designers with a higher level of hardware and software IP integration, enabling them to achieve their design goals faster and with significantly less risk.”

    Source : Laxmi Narayan

     

     

     

    Source : Laxmi Narayan

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